Modelling of Carbon Nanotube Field Effect Transistors oriented to SPICE software for A/D circuit design

signed using 3 identical CNTFET, while resistors represent parasitic elements. The further fourth NOT gate has been used only to load the third stage. We have simulated the circuit driven by a 14ps clock, also in this case the CNT quantum inductance is negligible since the magnitude of the inductive reactance is much smaller than the resistances RD, RS. In the above simulations quantum capacitances depend on the polarization voltages. This implies that, by repeating the simulation with fixed values of capacitances, the signal is strongly degraded when it propagates in the circuit. The proposed model is based on a work of A. Raychowdhury et al. and on the following improvements introduced by F. Prégaldiny et al. The model, developed for a n-type C-CNTFET with semiconductor single wall CNT having diameters ranging from 1 nm to 4 nm, is based on the hypothesis of ballistic transport.